Most instructions on the Z80 processor were designed with a purpose, and you can't do anything except what the instruction was created for.  For example, you can't do anything with ld a, imm₈ except store a byte value into register A.  Similarily, you can't use ld a, e to pop hl off the stack 

However, there are those rare times that you can use an instruction creatively for a purpose that the Z80 designers did not intend!  Please share your stories

Mine deals with LDD.  For a routine I'm working on for Elimination, I always need BC to point to one byte before HL, where HL holds the data from plotsscreen to transfer to a buffer.  This is because I need access to both (HL) and (HL-1) every time a byte is transferred to the buffer.   By using LDD, I can decrease HL and BC at the same time, even though the Z80 designers meant for BC to be decreased as a Byte Counter.

Similar to yours, CPD not only decreases DE and BC but checks to see if BC is zero.

Decreases HL and BC, you mean.

Well, let's see... SP is meant to be used as a stack pointer, but in TI-Boy I use it to read 2 bytes from the Game Boy instruction stream at once.

EXX and EX AF,AF' are meant to be used in interrupt handlers, but I often use them for extra registers.

I'm sure it's possible to use I as an extra register when you don't have IM 2 interrupts enabled, though I haven't personally done so.

I've used DAA to optimize conversion between a raw hex digit and an ASCII hex digit.

JR nz/z/nc/c, $+1 can be used as a conditional RST 38h (because it jumps to the $FF in the JR encoding)

Also, in TI-Boy I use a 257-byte buffer of $FD bytes for my interrupt table, which doubles as a nop-slide (I throw the handlers for invalid opcodes into this buffer)

Here is an incredibly inefficient and slow way to do an "ex h,l" but its impressive that it uses no extra registers or memory.  Even the carry flag is preserved:
ExhHL:
  adc hl,hl
  adc hl,hl
  adc hl,hl
  adc hl,hl
  adc hl,hl
  adc hl,hl
  adc hl,hl
  adc hl,hl
  rl  lYou could do the same strategy with any 2 registers, although none as efficiently.  I guess this could be theoretically useful in a non-time sensitive situation when you need to do an exchange but all registers are in use including SP (so no stacks) and there is no more free ram, but I doubt anyone would be in that situation.