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Author Topic: flag register question (solved)  (Read 4126 times)

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Offline z80man

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flag register question (solved)
« on: June 07, 2011, 12:46:16 pm »
As many can tell from my avatar I'm working on an 83+/84+ emulator for the Prizm. I did have one question when it came to the half-carry flag. Can it be OR'd with bit 4 of the result byte or do I have to process the lower nibble of the operands and check for a half-carry there. Because the SuperH does not use flag registers testing for these conditions can be difficult so I'm hoping that I can just OR the bit, but if not I will have to add many cycles to the emulator to get the proper result.
« Last Edit: June 09, 2011, 12:40:55 pm by z80man »
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List of stuff I need to do before September:
1. Finish the Emulator of the Casio Prizm (in active development)
2. Finish the the SH3 asm IDE/assembler/linker program (in active development)
3. Create a partial Java virtual machine  for the Prizm (not started)
4. Create Axe for the Prizm with an Axe legacy mode (in planning phase)
5. Develop a large set of C and asm libraries for the Prizm (some progress)
6. Create an emulator of the 83+ for the Prizm (not started)
7. Create a well polished game that showcases the ability of the Casio Prizm (not started)

Offline Runer112

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Re: flag register question
« Reply #1 on: June 07, 2011, 03:45:24 pm »
Yes, you do actually have to check if a half-carry occured. So something like this would not result in the half-carry flag being set:

    %00010000
 +  %00001000
    %00011000

But this would:

    %00011000
 +  %00001000
    %00100000
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Offline z80man

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Re: flag register question
« Reply #2 on: June 08, 2011, 08:08:00 pm »
Ah I see, I'm guessing the same thing for the carry flag on 16 bit operations
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List of stuff I need to do before September:
1. Finish the Emulator of the Casio Prizm (in active development)
2. Finish the the SH3 asm IDE/assembler/linker program (in active development)
3. Create a partial Java virtual machine  for the Prizm (not started)
4. Create Axe for the Prizm with an Axe legacy mode (in planning phase)
5. Develop a large set of C and asm libraries for the Prizm (some progress)
6. Create an emulator of the 83+ for the Prizm (not started)
7. Create a well polished game that showcases the ability of the Casio Prizm (not started)

Offline Runer112

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Re: flag register question
« Reply #3 on: June 08, 2011, 08:10:19 pm »
Yes, 16-bit operations affect the half-carry flag similarly. However instead of detecting carry at the bit 7/bit 8 boundary like you might expect a half-carry to do for a 16-bit operation, it's actually the bit 11/bit 12 boundary.
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Offline z80man

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Re: flag register question
« Reply #4 on: June 08, 2011, 08:13:51 pm »
okay I see how this works. Funny thing is that jumps are the fastest routines to emulate while simple arithmetic is the slowest due to the flag register. On 16 bit operations is the carry flag affected by the bit 7/8 boundary or the bit 15/16 boundary
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List of stuff I need to do before September:
1. Finish the Emulator of the Casio Prizm (in active development)
2. Finish the the SH3 asm IDE/assembler/linker program (in active development)
3. Create a partial Java virtual machine  for the Prizm (not started)
4. Create Axe for the Prizm with an Axe legacy mode (in planning phase)
5. Develop a large set of C and asm libraries for the Prizm (some progress)
6. Create an emulator of the 83+ for the Prizm (not started)
7. Create a well polished game that showcases the ability of the Casio Prizm (not started)
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