Author Topic: WikiTI (Read 83674 times)

Xeda112358 · « **Reply #90 on:** May 13, 2014, 10:00:28 am »

Speaking of the key port...
I don't know if anybody else does this, but in some high-speed programs that only use 1 or 2 groups, I disable interrupts, set the key group(s) I need, and I never have to write to the port again (just read). So for example, I made a Snake game that only used the arrows and [2nd], [mode], and [del], so I wrote $BE to the port. At the beginning of the game loop, I just need to do in a,(1) with no worry about delays to read the key press. So yeah, in some of my games, pressing things like F2 to F5 will also act as arrow presses.

Otherwise, if I need _GetK and the program needs to be small and can use interrupts, turn on interrupts and spend only 13 cycles to either read 8445h or 843Fh (whichever is needed) for the same effect.

Streetwalrus · « **Reply #91 on:** May 13, 2014, 10:53:35 am »

Oh wow that's what Soru was talking about the other day.

Nice trick.

Sorunome · « **Reply #92 on:** May 13, 2014, 11:50:35 am »

Quote from: Streetwalrus on May 13, 2014, 10:53:35 am

Oh wow that's what Soru was talking about the other day. Nice trick.

Hehe, I got the trick from Iambian and geekboy

the_mad_joob · « **Reply #93 on:** May 13, 2014, 07:48:28 pm »

Yes xedy, reading multiple groups at the same time should be done, when possible =]

I'm very curious about something.
Like i said earlier, we basically have these 2 behaviours :

write
delay
read

or

reset
delay
write
read

The question is, why doing a reset removes the delay needed bewteen a write & a read ?
Hardware-speaking, i have no ideas how the keyboard really works, but i have a theory that could explain that.
What if :

Case 1 : The writing causes one or more group(s) to be disabled (one or more bit(s) in the group map changes from 0 to 1). > slow operation for the keybord, delay required before reading
That is the case when you switch from one group to another, for example.

Case 2 : All other cases (enabling groups or not modifying them) > very fast operation, no delay
That is the case when you write anything after having performed a reset, but also when you enable some more groups without disabling the previous ones.

I will try to verify that asap...

#####

EDIT 1 :

Ok, just tested it, and it doesn't work like that.
However, i found something strange.
Here is the code i used :

Code: [Select]

    di

    ld a,1
    out ($20),a ; 15Mhz

    ld a,00000010b
    out (1),a ; enabling all groups except the one including [CLEAR]

    ld b,0
loop1
    djnz loop1

loop2

    ld a,11111101b
    out (1),a ; enabling group including [CLEAR]

    in a,(1)
    cp 10111111b ; checking if [CLEAR] being pressed
    jr nz,loop2

As you can see, there is no delay before i read port 1.
Guess what ? PC actually exits the loop instantly when i press [CLEAR].
Any idea why ?

#####

EDIT 2 :
found out : loop2 starts, OUT done, IN skipped, jump, OUT skipped, IN done, exit
Not what i wanted to find, but anyway, it seems a delay is also needed between reading & writing...

#####

EDIT 3 :
Did some more tests.
It seems my initial theory was half-right.
I decided to create a dedicated topic about it.

the_mad_joob · « **Reply #94 on:** August 03, 2020, 01:09:05 pm »

https://wikiti.brandonw.net/index.php?title=83Plus:Ports:2F
Quote : "After every write to the LCD bit 1 of port 2 resets for a certain amount of time based on the current cpu speed and if the calculator is in hi speed mode."
It's actually working after every read aswell (tested with both ports $10 & $11).

https://wikiti.brandonw.net/index.php?title=83Plus:OS:Memory_Layout
The stack goes until $FFFE ($FFFF is actually unused by the system, that's right, an extra scrap byte).

https://wikiti.brandonw.net/index.php?title=Z80_Instruction_Set
Quote : "POP Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again. The word based at the starting value of SP is zeroed."
The last sentence is wrong and should be removed.
Also, no matter how useful they are, the following instructions are missing :
ld J,N
ld ixh,ixh
ld ixl,ixl
ld iyh,iyh
ld iyl,iyl

https://wikiti.brandonw.net/index.php?title=83Plus:OS:Certificate/Headers:Fields:Application_Headers
Quote : "In theory, it is legal to specify the master field as 800D xxxx if the application is less than 64 K in size. However, rabbitsign won't sign it."
It should be "800E" instead of "800D", or even more accurately "800DXX or 800EXXXX".

https://wikiti.brandonw.net/index.php?title=83Plus:OS:Raw_Flash_Commands
In the example code of the "Writing" section, using a "bit 5,(hl)" instruction is actually wrong.
Indeed, if the writing becomes successful after the xor (hl) instruction, reading (hl) again won't return status data anymore.
In other words, such algorithm could return a failure where there isn't any.
The right way to do it is to check both bits from a single reading.
Unoptimised replacement code :

Code: [Select]

	...
programWaitLoop:
	in	a, (keyPort)
	cp	0BFh
	jr	z, abortProgram
	ld	a, (hl)
	ld	c, a
	xor	b
	bit	7, a
	jr	z, programDone
	bit	5, c
	jr	z, programWaitLoop
abortProgram:
	...

https://wikiti.brandonw.net/index.php?title=Category:83Plus:Ports:By_Address
Quote : "All writes to mirrored ports are ignored."
That is wrong and should be removed.

https://wikiti.brandonw.net/index.php?title=83Plus:OS:Variable_Storage_in_the_User_Archive
It's stated that a sector can start with $FC, anybody knows in which case ?

https://wikiti.brandonw.net/index.php?title=83Plus:Ports:2E
It's worth noting that as far as bits 0 & 4 are concerned, the extra clock cycle is doubled if the instruction is prefixed.
We can safely deduct that the port adds a clock cycle each time the R register is incremented.

https://wikiti.brandonw.net/index.php?title=83Plus:Ports:01
Quote : "While a key is in a state between pressed and released, it will repeatedly turn on and off."
It's worth mentioning that such behaviour only occurs for keys that were just released, not pressed.
In other words, a key that was just released can be detected as pressed right after, but not the other way around.

https://wikiti.brandonw.net/index.php?title=83Plus:Ports:20
In the "Examples" section, it's worth mentioning that the second method will switch to CPU speed 3, not 1.
That speed may not be fully supported software-wise, most notably because the default delays provided by ports $29>$2C|$2E|$2F vary from one speed to another.
Here is a jump-free method that switches to speed 1 instead :
in a,($02)
rlca
and %00000001
out ($20),a

Xeda112358 · « **Reply #95 on:** August 03, 2020, 04:41:35 pm »

You can edit the pages on wikiti btw. As for the mirrored port writing being ignored, that's actually really handy to know. I suspect that two different people contributed those facts, or maybe it was he came person who forgot?

the_mad_joob · « **Reply #96 on:** December 08, 2020, 07:36:38 pm »

Quote from: Xeda112358 on August 03, 2020, 04:41:35 pm

As for the mirrored port writing being ignored, that's actually really handy to know.

I found back my old 83+ from 1999, so i was finally able to test that.
So, i can confirm that writes to mirrored ports are definitely NOT ignored, updated my previous post.
At least, writing to port $20 had the exact same effect as actually writing to port $00.
Cheers.

Xeda112358 · « **Reply #97 on:** December 08, 2020, 08:13:42 pm »

Oh, thanks for confirming that. I know the code to set 15MHz mode does take some advantage of that, because it essentially writes a 0 to port 20h (mirror of the link port) on those calcs which is generally safe, but writes a non-zero value on the other calcs.

the_mad_joob · « **Reply #98 on:** December 08, 2020, 08:21:22 pm »

Quote from: Xeda112358 on December 08, 2020, 08:13:42 pm

Oh, thanks for confirming that. I know the code to set 15MHz mode does take some advantage of that, because it essentially writes a 0 to port 20h (mirror of the link port) on those calcs which is generally safe, but writes a non-zero value on the other calcs.

I actually just re-tested that method aswell.
While it's safe on the 83+BE if there's no link activity, i wouldn't recommend using it on other models, see my note on port $20 on my synthesis post.

NonstickAtom785 · « **Reply #99 on:** December 09, 2020, 01:39:11 pm »

Quote from: the_mad_joob on December 08, 2020, 08:21:22 pm

Quote from: Xeda112358 on December 08, 2020, 08:13:42 pm
Oh, thanks for confirming that. I know the code to set 15MHz mode does take some advantage of that, because it essentially writes a 0 to port 20h (mirror of the link port) on those calcs which is generally safe, but writes a non-zero value on the other calcs.
I actually just re-tested that method aswell.
While it's safe on the 83+BE if there's no link activity, i wouldn't recommend using it on other models, see my note on port $20 on my synthesis post.

Well I made some of those fixes from above. You should get yourself an account

.

the_mad_joob · « **Reply #100 on:** December 09, 2020, 06:14:37 pm »

Quote from: NonstickAtom785 on December 09, 2020, 01:39:11 pm

Well I made some of those fixes from above. You should get yourself an account .

Thanks for your time, and for the community.
My name wasn't necessary in the credits at all, but i understand, i would have done the same.
I have some more discoveries in my backpack, so yeah, i'll try to make an account next time.

Author Topic: WikiTI (Read 83674 times)

Xeda112358

Re: WikiTI

Streetwalrus

Re: WikiTI

Sorunome

Re: WikiTI

the_mad_joob

Re: WikiTI

the_mad_joob

Re: WikiTI

Xeda112358

Re: WikiTI

the_mad_joob

Re: WikiTI

Xeda112358

Re: WikiTI

the_mad_joob

Re: WikiTI

NonstickAtom785

Re: WikiTI

the_mad_joob

Re: WikiTI