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Oh wow that's what Soru was talking about the other day. Nice trick.
di ld a,1 out ($20),a ; 15Mhz ld a,00000010b out (1),a ; enabling all groups except the one including [CLEAR] ld b,0loop1 djnz loop1loop2 ld a,11111101b out (1),a ; enabling group including [CLEAR] in a,(1) cp 10111111b ; checking if [CLEAR] being pressed jr nz,loop2
...programWaitLoop: in a, (keyPort) cp 0BFh jr z, abortProgram ld a, (hl) ld c, a xor b bit 7, a jr z, programDone bit 5, c jr z, programWaitLoopabortProgram: ...
As for the mirrored port writing being ignored, that's actually really handy to know.
Oh, thanks for confirming that. I know the code to set 15MHz mode does take some advantage of that, because it essentially writes a 0 to port 20h (mirror of the link port) on those calcs which is generally safe, but writes a non-zero value on the other calcs.
Quote from: Xeda112358 on December 08, 2020, 08:13:42 pmOh, thanks for confirming that. I know the code to set 15MHz mode does take some advantage of that, because it essentially writes a 0 to port 20h (mirror of the link port) on those calcs which is generally safe, but writes a non-zero value on the other calcs.I actually just re-tested that method aswell.While it's safe on the 83+BE if there's no link activity, i wouldn't recommend using it on other models, see my note on port $20 on my synthesis post.
Well I made some of those fixes from above. You should get yourself an account .