Fixed a couple spelling errors. New model looks nice. Hope it's a bit faster.

Some people in Cemetech have speculated that it might actually be Nspire hardware in disguise, emulating a TI-84 Plus C SE with a modified OS.

[cross-posted from Cemetech]
If the new model does indeed use an ARM with a Z80 emulation layer, I suspect there will be a programmer interface for direction ARM code execution, because software development and maintenance costs are much higher for Z80 assembly. They therefore have a strong business incentive to mitigate that with C-based ARM code.

However, I would like to suggest an alternative theory based on the history of TI's previous Z80 line.

In 1996, TI released the TI-83. It provided the correct combination of math functionality for the lucrative high school education market, but limited programmability. Therefore, in 1999, TI released the TI-83 Plus, featuring the same math capabilities, but with enhanced programmability via 512 K of execute-in-place (XIP) flash memory. In time, however, the device proved to feel slow, and half a megabyte proved to be somewhat limited for some students. Therefore, in 2001, TI released the TI-83 Plus SE.

Concurrently with TI-83 Plus development, TI developed the TI-86. The TI-86 addressed limited memory by adding more RAM, but proved unsuited for the high school market due to too-advanced mathematical abilities.

The TI-83 Plus SE featured the same general architecture, but with an entirely new ASIC with a much-improved MMU, the Z80 integrated into the ASIC to reduce chip-count and pin-count, and support for multiple flash chip sizes, going into production with a 2048 K chip. It also secretly featured more RAM, with support for up to 256 K, and perhaps TI wanted to see what 3rd-parties would do with the 128 K that went into production. Somewhat strangely, the TI-83 Plus SE also featured two mirror ports of the LCD ports, possibly suggesting support for a second chip-select line for the LCD driver interface to permit a more sophisticated driver in the future. The success of the TI-83 Plus SE led TI to develop further yet another new ASIC for the TI-84 Plus/SE line.

Released 3 years later in 2004, the TI-84 Plus/SE models appeared to add little new to the TI-83 Plus SE---which was now discontinued---, adding only a USB port and a clock, and the option of either 1024 or 2048 K of flash. Internally, the TI-84 Plus/SE ASIC saved money for TI by integrating the RAM into the ASIC, eliminating an extra chip from the hardware. Moreover, the USB port proved successful, as the older DBUS port was antiquated. TI later posted an update to the TI-84 Plus/SE OS, adding some minor new functionality, which was well-received, but not a market-changer. Then, in 2007, TI, having noticed that the extra RAM wasn't being used much, silently released a cost-saving update to the ASIC, featuring less RAM but otherwise identical. Three years, TI released a significant update to the TI-84 Plus/SE OS: MathPrint. MathPrint addressed significant usability concerns for students, and was well received.

Again three years later, in 2012, market desires were changing again. The TI-83 Plus and TI-84 Plus/SE line were ridiculed for having the same old 90's-era B&W LCD. Therefore, TI slapped a color screen on the same old hardware, and utilized the ASIC's support for multiple flash chip sizes to increase flash to 4096 K. Because the back light for color LCD consumes far more power, TI also replaced the AAAs batteries with a rechargeable LiPo cell, giving us the TI-84 Plus C SE. The OS for the new model required significant changes to support the new LCD, but the overall interface retained the same text-centric design. Overall, teachers and students liked the fancy-but-not-very-useful color LCD, but panned the slow performance and large imbalance between the smaller user RAM and far larger archive.

TI's engineers concluded that the performance issues would be difficult to address, being in-part due to the large large pixel count being driven by a slow CPU. Unfortunately, the Z80 in the ASIC could not be driven much faster, possibly due to the old process node of the ASIC, and the nature of the IP TI was using for the Z80 core. While it would be possible to optimize the OS to run faster on the color LCD, Z80 assembly optimization is not something TI's engineers are good at. While they could increase available user RAM with an OS update, they chose not to, perhaps feeling that it would be too much of an ass-pull.

Given this history, I'd like to suggest the following for the TI-84 Plus CE:

The TI-84 Plus CE is based around yet another revision of the Z80 line ASIC. It again features 4096 K of XIP flash memory, and a Z80-compatible CPU. However, the Z80 is not the same Z80 IP TI previously used. Instead, it is a Z80-compatible CPU with either or both superior pipe-lining and a faster CPU clock speed. Because the CPU is still a Z80-compatible CPU, TI did not need to re-engineer the user interface of the TI-83/84 Plus line, nor license a considerably more expensive ARM CPU IP. The ASIC also features the maximum 256 K of RAM that the 2001 TI-83 Plus SE ASIC specification supports, and TI altered the OS to make much of that RAM available to end-users through changes similar to how the TI-86 supports extended RAM. As TI re-engineered most of the ASIC with a new CPU IP and more RAM, they also likely took the chance to move the ASIC to a newer, smaller process node, reducing production costs through using a smaller die, despite a considerably higher transistor count.

I therefore expect that porting older TI-84 Plus C SE software to the TI-84 Plus CE will not be too difficult. However, porting will be nonetheless be required, because the OS's handling of user RAM changed significantly in order to support addressing more than 32 K of user RAM. Games are likely to be easily ported and compiled for both models, while software that interfaces more closely with the OS's math and user storage functions may require much more work.

Overall, the TI-84 Plus CE is therefore just another evolution of TI's high-school-oriented calculator line. While we may find that being kept in the dark about the new hard is annoying (I bet IQ Joe has a pre-production sample), the new model will likely be very well-received by both the education community and the programmer community.

One of these would be nice, something to use on a test, but I have difficulty justifying the investment; without 3D capability, there's not much to justify this thing over the 84SE I already have. Sure, nspires are powerful enough for 3D, but the cost of those things is prohibitive, and they're not allowed in places that 84s are. What with all the ARM chips lying around these days, I'd place my money on it just being an ARM CPU with some actual power in it, rather than a z80, though I question why emulation would even be necessary; with its own OS, what is it emulating? TI-Basic has always been interpreted, hasn't it?

And why emulating the OS? It would be cheaper for TI to do so.

This exactly. Since they have already written a z80 emulator for the nspire, development costs for the software is a lot lower then having to rebuild the OS from the ground up to be compatible.

I do agree with DrDnar's theory though, I think that it might just be an upgraded ASIC with a z80-compatible chip. I'm actually hopeful that this is the case. Just using an ARM chip emulating a z80 is fraught with possible issues for standardized testing etc.

Just thought of a crazy idea: If it was emulated on an ARM, maybe we'd be able to break the emulation and make programs that you start over the normal TIOS but then run nativley on the ARM.
Well, actually let's not discuss such things while we don't have actual info yet xD

this seems like it has lots of potential to be very good or very bad. we'll see soon, i guess.

Wow, that is great news! I was afraid it'd be an ARM emulating a z80