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Messages - Goplat
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226
« on: January 16, 2011, 05:55:59 pm »
I've discovered that the TI-Nspire's CPU supports a feature called Jazelle which allows Java code to be partially interpreted by hardware, making it significantly faster than it would be with a plain interpreter. Obviously, the 90MB Java runtime environment is never going to fit on the Nspire, but I wonder if it might be practical to port something like J2ME. It seems a shame to let that hardware go to waste  Here's a little test program, that uses Jazelle to calculate 2+2 (impressive, huh?  )
227
« on: January 15, 2011, 04:36:19 pm »
Golpat, is that a dictionary? If that is python, I am not aware of what that is. Also, I'm very happy that you made it I have to know what that is to use it.
It's just a list of 2-entry tuples. I used zip to turn it inside out and get two large lists. edit: forgot they're called lists in python, not "arrays"
228
« on: January 15, 2011, 04:30:41 pm »
equates, prizmInstructions = zip(*[
('Enii', 'Mov #imm, Rn'),
('9ndd', 'Mov.W @(disp*2+PC),Rn'),
('Dndd', 'MOV.L @(disp*4+PC),Rn'),
('6nm3', 'Mov Rm, Rn'),
('2nm0', 'MOV.B Rm,@Rn'),
('2nm1', 'Mov.W Rm,@Rn'),
('2nm2', 'Mov.L Rm,@Rn'),
('6nm0', 'Mov.B @Rm,Rn'),
('6nm1', 'Mov.W @Rm,Rn'),
('6nm2', 'Mov.L @Rm,Rn'),
('2nm4', 'MOV.B Rm,@-Rn'),
('2nm5', 'MOV.W Rm,@-Rn'),
('2nm6', 'MOV.L Rm,@-Rn'),
('6nm4', 'MOV.B @Rm+,Rn'),
('6nm5', 'MOV.W @Rm+,Rn'),
('6nm6', 'MOV.L @Rm+,Rn'),
('80nd', 'MOV.B R0,@(disp+Rn)'),
('81nd', 'MOV.W R0,@(disp*2+Rn)'),
('1nmd', 'MOV.L Rm,@(disp*4+Rn)'),
('84md', 'MOV.B @(disp+Rm),R0'),
('85md', 'MOV.W @(disp*2+Rm),R0'),
('5nmd', 'MOV.L @(disp*4+Rm),Rn'),
('0nm4', 'MOV.B Rm,@(R0+Rn)'),
('0nm5', 'MOV.W Rm,@(R0+Rn)'),
('0nm6', 'MOV.L Rm,@(R0+Rn)'),
('0nmC', 'MOV.B @(R0+Rm),Rn'),
('0nmD', 'MOV.W @(R0+Rm),Rn'),
('0nmE', 'MOV.L @(R0+Rm),Rn'),
('C0dd', 'MOV.B R0,@(disp+GBR)'),
('C1dd', 'MOV.W R0,@(disp*2+GBR)'),
('C2dd', 'MOV.L R0,@(disp*4+GBR)'),
('C4dd', 'MOV.B @(disp+GBR),R0'),
('C5dd', 'MOV.W @(disp*2+GBR),R0'),
('C6dd', 'MOV.W @(disp*4+GBR),R0'),
('C7dd', 'MOVA @(disp*4+PC),R0'),
('0n29', 'MOVT Rn'),
('0n83', 'PREF @Rn'),
('6nm8', 'SWAP.B Rm,Rn'),
('6nm9', 'SWAP.W Rm,Rn'),
('2nmD', 'XTRCT Rm,Rn'),
('3nmC', 'ADD Rm,Rn'),
('7nii', 'ADD #imm,Rn'),
('3nmE', 'ADDC Rm,Rn'),
('3nmF', 'ADDV Rm,Rn'),
('88ii', 'CMP/EQ #imm,R0'),
('3nm0', 'CMP/EQ Rn,Rm'),
('3nm2', 'CMP/HS Rm,Rn'),
('3nm3', 'CMP/GE Rm,Rn'),
('3nm6', 'CMP/HI Rm,Rn'),
('3nm7', 'CMP/GT Rm,Rn'),
('4n11', 'CMP/PZ Rn'),
('4n15', 'CMP/PL Rn'),
('2nmC', 'CMP/STR Rm,Rn'),
('3nm4', 'DIV1 Rm,Rn'),
('2nm7', 'DIV0S Rm,Rn'),
('001A', 'DIV0U'),
('3nmD', 'DMULS.L Rm,Rn'),
('3nm5', 'DMULU.L Rm,Rn'),
('4n10', 'DT Rn'),
('6nmE', 'EXTS.B Rm,Rn'),
('6nmF', 'EXTS.W Rm,Rn'),
('6nmC', 'EXTU.B Rm,Rn'),
('6nmD', 'EXTU.W Rm,Rn'),
('0nmF', 'MAC.L @Rm+,@Rn+'),
('4nmF', 'MAC.W @Rm+,@Rn+'),
('0nm7', 'MUL.L Rm,Rn'),
('2nmF', 'MULS.W Rm,Rn'),
('2nmE', 'MULU.W Rm,Rn'),
('6nmB', 'NEG Rm,Rn'),
('6nmA', 'NEGC Rm,Rn'),
('3nm8', 'SUB Rm,Rn'),
('3nmA', 'SUBC Rm,Rn'),
('3nmB', 'SUBV Rm,Rn'),
('2nm9', 'AND Rm,Rn'),
('C9ii', 'AND #imm,R0'),
('CDii', 'AND.B #imm,@(R0+GBR)'),
('6nm7', 'NOT Rm,Rn'),
('2nmB', 'OR Rm,Rn'),
('CBii', 'OR #imm,R0'),
('CFii', 'OR.B #imm,@(R0+GBR)'),
('4nm8', 'TAS.B @Rn'),
('2nm8', 'TST Rm,Rn'),
('C8ii', 'TST #imm,R0'),
('CCii', 'TST.B #imm,@(R0+GBR)'),
('2nmA', 'XOR Rm,Rn'),
('CAii', 'XOR #imm,R0'),
('CEii', 'XOR.B #imm,@(R0+GBR)'),
('4n04', 'ROTL Rn'),
('4n05', 'ROTR Rn'),
('4n24', 'ROTCL Rn'),
('4n25', 'ROTCR Rn'),
('4nmC', 'SHAD Rm,Rn'),
('4n20', 'SHAL Rn'),
('4n21', 'SHAR Rn'),
('4nmD', 'SHLD Rm,Rn'),
('4n00', 'SHLL Rn'),
('4n01', 'SHLR Rn'),
('4n08', 'SHLL2 Rn'),
('4n09', 'SHLR2 Rn'),
('4n18', 'SHLL8 Rn'),
('4n19', 'SHLR8 Rn'),
('4n28', 'SHLR8 Rn'),
('4n29', 'SHLR16 Rn'),
('8Bdd', 'BF label'),
('8Fdd', 'BF/S label'),
('89dd', 'BT label'),
('8Ddd', 'BT/S label'),
('Addd', 'BRA label'),
('0n03', 'BRAF Rn'),
('Bddd', 'BSR label'),
('0n03', 'BSRF Rn'),
('4n2B', 'JMP @Rn'),
('4n0B', 'JSR @Rn'),
('000B', 'RTS'),
('0028', 'CLRMAC'),
('0048', 'CLRS'),
('0008', 'CLRT'),
('4m0E', 'LDC Rm,SR'),
('4m1E', 'LDC Rm,GBR'),
('4m2E', 'LDC Rm,VBR'),
('4M3E', 'LDC Rm,SSR'),
('4m4E', 'LDC Rm,SPC'),
('4m8E', 'LDC Rm,R0_BANK'),
('4m9E', 'LDC Rm,R1_BANK'),
('4mAE', 'LDC Rm,R2_BANK'),
('4mBE', 'LDC Rm,R3_BANK'),
('4mCE', 'LDC Rm,R4_BANK'),
('4mDE', 'LDC Rm,R5_BANK'),
('4mEE', 'LDC Rm,R6_BANK'),
('4mFE', 'LDC Rm,R7_BANK'),
('4m07', 'LDC.L @Rm+,SR'),
('4m17', 'LDC.L @Rm+,GBR'),
('4m27', 'LDC.L @Rm+,VBR'),
('4m37', 'LDC.L @Rm+,SSR'),
('4m47', 'LDC.L @Rm+,SPC'),
('4m87', 'LDC.L @Rm+,R0_BANK'),
('4m97', 'LDC.L @Rm+,R1_BANK'),
('4mA7', 'LDC.L @Rm+,R2_BANK'),
('4mB7', 'LDC.L @Rm+,R3_BANK'),
('4mC7', 'LDC.L @Rm+,R4_BANK'),
('4mD7', 'LDC.L @Rm+,R5_BANK'),
('4mE7', 'LDC.L @Rm+,R6_BANK'),
('4mF7', 'LDC.L @Rm+,R7_BANK'),
('4m0A', 'LDS Rm,MACH'),
('4m1A', 'LDS Rm,MACL'),
('4m2A', 'LDS Rm,PR'),
('4m06', 'LDS.L @Rm+,MACH'),
('4m16', 'LDS.L @Rm+,MACL'),
('4m26', 'LDS.L @Rm+,PR'),
('0038', 'LDTLB'),
('0009', 'NOP'),
('0n83', 'PREF @Rn'),
('002B', 'RTE'),
('0058', 'SETS'),
('0018', 'SETT'),
('001B', 'SLEEP'),
('0n02', 'STC SR,Rn'),
('0n12', 'STC GBR,Rn'),
('0n22', 'STC VBR,Rn'),
('0n32', 'STC SSR,Rn'),
('0n42', 'STC SPC,Rn'),
('0n82', 'STC R0_BANK,Rn'),
('0n92', 'STC R1_BANK,Rn'),
('0nA2', 'STC R2_BANK,Rn'),
('0nB2', 'STC R3_BANK,Rn'),
('0nC2', 'STC R4_BANK,Rn'),
('0nD2', 'STC R5_BANK,Rn'),
('0nE2', 'STC R6_BANK,Rn'),
('0nF2', 'STC R7_BANK,Rn'),
('4n03', 'STC.L SR,@-Rn'),
('4n13', 'STC.L GBR,@-Rn'),
('4n23', 'STC.L VBR,@-Rn'),
('4n33', 'STC.L SSR,@-Rn'),
('4n43', 'STC.L SPC,@-Rn'),
('4n83', 'STC.L R0_BANK,@-Rn'),
('4n93', 'STC.L R1_BANK,@-Rn'),
('4nA3', 'STC.L R2_BANK,@-Rn'),
('4nB3', 'STC.L R3_BANK,@-Rn'),
('4nC3', 'STC.L R4_BANK,@-Rn'),
('4nD3', 'STC.L R5_BANK,@-Rn'),
('4nE3', 'STC.L R6_BANK,@-Rn'),
('4nF3', 'STC.L R7_BANK,@-Rn'),
('0n0A', 'STS MACH,Rn'),
('0n1A', 'STS MACL,Rn'),
('0n2A', 'STS PR,Rn'),
('4n02', 'STS.L MACH,@-Rn'),
('4n12', 'STS.L MACL,@-Rn'),
('4n22', 'STS.L PR,@-Rn'),
('C3ii', 'TRAPA #imm'),
])
Yeah, I cheated :p but hey, this is a lot more readable anyway
Edit: when you said in order, did you mean in numerical order or in the order of the original HTML file? numerical order is kind of ambiguous (0008 could go before or after 0n02, depending on n)
229
« on: January 10, 2011, 10:40:29 pm »
Not really, no. Prime number stuff would only require the amount of RAM necessary for storing the two numbers (Prime and what you're testing) and whatever your multiple precision math function takes. Nobody factors large numbers by trying to divide by all possible primes. If you turned the entire Earth into a giant supercomputer cluster, with every gram of matter being another processor, and let it run for a trillion years, it still could not have factored even a measly 400-bit key this way. No joke. Sieves would probably take more though. Indeed. The recent factorization of RSA-768 couldn't even fit in RAM, it took about 5 terabytes of disk space as storage.
230
« on: January 10, 2011, 02:08:08 am »
Just found a little bug: I notice that when Ndless tries to restore the FIQ vector (in arm/bootstrapper.S main_copy), it overwrites the Undefined Instruction jump instead:
A4000000 18 F0 9F E5 E4 66 26 10-18 F0 9F E5 18 F0 9F E5
A4000010 18 F0 9F E5 18 F0 9F E5-18 F0 9F E5 18 F0 9F E5
A4000020 30 60 26 10 28 48 04 11-4C 47 04 11 20 48 04 11
A4000030 18 48 04 11 00 00 00 00-C0 66 26 10 40 00 00 00
231
« on: January 07, 2011, 05:39:21 pm »
mViewer is quite stable with Ndless 1.7, on non-CAS calculators, or even with Ndless 2.0 on non-CAS calculators.
I've got problems with the same binaries with Ndless 2.0 on a CAS ClickPad.
After exiting mViewer, the calculator does freeze or reboot very often (which does not happen on the non-CAS).
So may be there is a wrong address for a 2.0 CAS syscall, I'll try to find it. Tell me if you happen to have an idea on which one it could be.
I think freopen might be wrong, syscalls_cas-2.0.1.c has it as 102F6FFC but it should be 102F6FB8. EDIT: this couldn't be the problem, Ndless 1.7 didn't have freopen 
232
« on: January 06, 2011, 01:57:29 pm »
You're more likely to win the lottery 18 times in a row (probability is approximately 2-493) than you are to guess one of the 512-bit factors at random (probability 2-512).
233
« on: January 05, 2011, 03:47:27 pm »
so wait, getting this is normal? Okay, I'm writing a converter for that later. ;-)
Offset(h)
00000000 ë<.MSDOS5.0.....
00000010 ...v€ø..........
00000020 ....€.)....NO NA
00000030 ME FAT16 ..
00000040 ................
00000050 ................
Unfortunately, if all non-displayable bytes have been turned into '.', there's no way you can tell what bytes they were supposed to be originally. Here's a little program I wrote to get a raw binary dump of a drive. Run it from the command line, with the drive letter and output file as parameters (e.g. If your Prizm is drive X and you want to call the dump prizmdump.bin, you would run "dumpdrive X prizmdump.bin")
234
« on: January 03, 2011, 07:53:02 pm »
I keep getting this error. Is there a particular folder the .wad.tns is supposed to be in? I looked at the source and it seems to be trying to load .wad.tns files from the current directory, but I can't find where the current directory is set.
235
« on: January 02, 2011, 03:37:02 pm »
Ah yes, caches could be a big issue. In the Ndless program loader, after loading a program try running this: (info taken from the arm926ej-s manual)
tc_loop: MRC p15, 0, r15, c7, c10, 3 @test and clean DCache
BNE tc_loop
mov r0,#0
MCR p15, 0, r0, c7, c7, 0 @invalidate ICache and DCache I tried adding this, the frequent random crashes I was getting when starting a program are gone  Definitely the right idea, but I have a couple of quibbles: - Should we drain the write buffer too? (Although for Ndless it probably doesn't matter in practice - it'll be drained by itself by the time fread returns - but it would be nice to set a proper example for other programs)
- I don't think it's necessary to invalidate the DCache, only the ICache. (MCR p15, 0, <Rd>, c7, c5, 0) If interrupts are enabled, and an interrupt happens to occur between cleaning DCache and invalidating it, it could make memory writes made by the interrupt handler disappear.
236
« on: January 02, 2011, 02:24:12 pm »
The big problem with modifying BOOT1: If anything goes wrong, your calculator is completely bricked unless you can somehow remove the BOOT1 flash chip, build a device to re-flash it, and put it back in. Maybe critor could pull this off but I certainly can't  Note that on the newer hardware models, the BOOT1 flash chip is not present. Their BOOT1 is most likely built in to the big ASIC as just a read-only ROM rather than Flash.
237
« on: December 31, 2010, 04:27:42 pm »
Yeah unfortunately they were only posted on United-TI, which is not visited as much as here for Nspire talk nowadays. On top of that you need to sign up a new account to download them. I hate it when websites force you to register just to view or download things. There used to be a nice website called BugMeNot where people would post throwaway login/password combos for the public to use, but it's not too useful any more because every site is banned. DJ, since this forum doesn't seem to force registration for attachment downloads, would you mind if I create a topic here and post future releases there instead?
238
« on: December 27, 2010, 02:03:09 pm »
So to sum up the previous posts:
1) The dynamic remap available on the HEAD of the SVN repository works for nobody, right?. Strangely it works for me on nspire_emu. nspire_emu is wrong: /Kn - set keypad type (2 = TI-84 Plus, 3 = Touchpad)
Keypad type 3 was a touchpad prototype or something, which apparently set appropriate directional key bits in 900E0010-900E002F when the touchpad was pressed down. Keypad type 4 is the touchpad that was actually sold. It never sets directional key bits. Instead, you have to use the I²C (which is not emulated yet) to get the touch position and whether it's pressed down or not. This screen from DIAGS 2.00.1183 says it all:
239
« on: December 26, 2010, 01:29:27 pm »
* Used to interface through usb or through the dock connector with an external SD card reader which has not been released yet (or is only used in factories to program the Flash during production, or to diagnose returned TI-Nspire) ?
I think this is it. See some of the strings in DIAGS: Test SD MMC Manu
Iris Nspire Diag Menu
Pass
No test
Pass - Press UP Arrow Key
Fail - Press DOWN Arrow Key
TI Build Mode
Read MBR....
Read PBS....
Read DEF....
SDCard Update NorFlash Code
Please don't power off the device...
Search P3....
Search Nor.Chk....
NOR
Search Nor.raw....
Copy Nor.raw to RAM....
Erasing the Norflash....
Copy RAM to Norflash ....
P3
NAND
Cann't Detect Sled !!
Don't power off the device!!
Insert Sled and Update code again...
Press ESC To Exit
Finished percents ...
Finshed and Reset your device
SD Card Read Error
SDCard Update NandFlash Code
Search Nand.Bin....
Erasing the Nand....
badblk
M OK!
Copy Nand.bin to NandFlash ....
SetFile DEF ....
OK ....
Copy Nand Data To SD Card
Verify SDCard Update NandFlash Code
Verify SDCard Update NorFlash Code
Comparing Nor.raw with Norflash ....
Search Nand.Chk....
Copy Nand.bin to RAM....
Skip Erase
M OK!
Copy RAM to NandFlash ....
16M OK!
SDCard Update Diagnostics
Search Diag.chk....
DIAG
Search Diag.img....
Copy Diag.img to RAM....
Erasing old image....
OK!
Updating image....
SDCard Run Test Program
Search Test.chk....
TEST
Search Test.img....
Copy Test.img to RAM....
Launching Test Program....
Finished and Reset your device
240
« on: December 24, 2010, 05:18:48 pm »
I bpbwbe mg
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